29 #ifndef _E1000_ICH8LAN_H_
30 #define _E1000_ICH8LAN_H_
32 #define ICH_FLASH_GFPREG 0x0000
33 #define ICH_FLASH_HSFSTS 0x0004
34 #define ICH_FLASH_HSFCTL 0x0006
35 #define ICH_FLASH_FADDR 0x0008
36 #define ICH_FLASH_FDATA0 0x0010
38 #define ICH_FLASH_READ_COMMAND_TIMEOUT 500
39 #define ICH_FLASH_WRITE_COMMAND_TIMEOUT 500
40 #define ICH_FLASH_ERASE_COMMAND_TIMEOUT 3000000
41 #define ICH_FLASH_LINEAR_ADDR_MASK 0x00FFFFFF
42 #define ICH_FLASH_CYCLE_REPEAT_COUNT 10
44 #define ICH_CYCLE_READ 0
45 #define ICH_CYCLE_WRITE 2
46 #define ICH_CYCLE_ERASE 3
48 #define FLASH_GFPREG_BASE_MASK 0x1FFF
49 #define FLASH_SECTOR_ADDR_SHIFT 12
51 #define E1000_SHADOW_RAM_WORDS 2048
53 #define ICH_FLASH_SEG_SIZE_256 256
54 #define ICH_FLASH_SEG_SIZE_4K 4096
55 #define ICH_FLASH_SEG_SIZE_8K 8192
56 #define ICH_FLASH_SEG_SIZE_64K 65536
57 #define ICH_FLASH_SECTOR_SIZE 4096
59 #define ICH_FLASH_REG_MAPSIZE 0x00A0
61 #define E1000_ICH_FWSM_RSPCIPHY 0x00000040
62 #define E1000_ICH_FWSM_DISSW 0x10000000
64 #define E1000_ICH_FWSM_FW_VALID 0x00008000
66 #define E1000_ICH_MNG_IAMT_MODE 0x2
68 #define ID_LED_DEFAULT_ICH8LAN ((ID_LED_DEF1_DEF2 << 12) | \
69 (ID_LED_DEF1_OFF2 << 8) | \
70 (ID_LED_DEF1_ON2 << 4) | \
73 #define E1000_ICH_NVM_SIG_WORD 0x13
74 #define E1000_ICH_NVM_SIG_MASK 0xC000
76 #define E1000_ICH8_LAN_INIT_TIMEOUT 1500
78 #define E1000_FEXTNVM_SW_CONFIG 1
79 #define E1000_FEXTNVM_SW_CONFIG_ICH8M (1 << 27)
81 #define PCIE_ICH8_SNOOP_ALL PCIE_NO_SNOOP_ALL
83 #define E1000_ICH_RAR_ENTRIES 7
85 #define PHY_PAGE_SHIFT 5
86 #define PHY_REG(page, reg) (((page) << PHY_PAGE_SHIFT) | \
87 ((reg) & MAX_PHY_REG_ADDRESS))
88 #define IGP3_KMRN_DIAG PHY_REG(770, 19)
89 #define IGP3_VR_CTRL PHY_REG(776, 18)
90 #define IGP3_CAPABILITY PHY_REG(776, 19)
91 #define IGP3_PM_CTRL PHY_REG(769, 20)
93 #define IGP3_KMRN_DIAG_PCS_LOCK_LOSS 0x0002
94 #define IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK 0x0300
95 #define IGP3_VR_CTRL_MODE_SHUTDOWN 0x0200
96 #define IGP3_PM_CTRL_FORCE_PWR_DOWN 0x0020
104 #define IMS_ICH_ENABLE_MASK (\