29 e1000_ms_hw_default = 0,
30 e1000_ms_force_master,
35 enum e1000_smart_speed {
36 e1000_smart_speed_default = 0,
41 s32 igb_check_downshift(
struct e1000_hw *hw);
42 s32 igb_check_reset_block(
struct e1000_hw *hw);
43 s32 igb_copper_link_setup_igp(
struct e1000_hw *hw);
44 s32 igb_copper_link_setup_m88(
struct e1000_hw *hw);
45 s32 igb_copper_link_setup_m88_gen2(
struct e1000_hw *hw);
46 s32 igb_phy_force_speed_duplex_igp(
struct e1000_hw *hw);
47 s32 igb_phy_force_speed_duplex_m88(
struct e1000_hw *hw);
48 s32 igb_get_cable_length_m88(
struct e1000_hw *hw);
49 s32 igb_get_cable_length_m88_gen2(
struct e1000_hw *hw);
50 s32 igb_get_cable_length_igp_2(
struct e1000_hw *hw);
51 s32 igb_get_phy_id(
struct e1000_hw *hw);
52 s32 igb_get_phy_info_igp(
struct e1000_hw *hw);
53 s32 igb_get_phy_info_m88(
struct e1000_hw *hw);
54 s32 igb_phy_sw_reset(
struct e1000_hw *hw);
55 s32 igb_phy_hw_reset(
struct e1000_hw *hw);
56 s32 igb_read_phy_reg_igp(
struct e1000_hw *hw, u32 offset, u16 *data);
57 s32 igb_set_d3_lplu_state(
struct e1000_hw *hw,
bool active);
58 s32 igb_setup_copper_link(
struct e1000_hw *hw);
59 s32 igb_write_phy_reg_igp(
struct e1000_hw *hw, u32 offset, u16 data);
60 s32 igb_phy_has_link(
struct e1000_hw *hw, u32 iterations,
61 u32 usec_interval,
bool *success);
62 void igb_power_up_phy_copper(
struct e1000_hw *hw);
63 void igb_power_down_phy_copper(
struct e1000_hw *hw);
64 s32 igb_phy_init_script_igp3(
struct e1000_hw *hw);
65 s32 igb_read_phy_reg_mdic(
struct e1000_hw *hw, u32 offset, u16 *data);
66 s32 igb_write_phy_reg_mdic(
struct e1000_hw *hw, u32 offset, u16 data);
67 s32 igb_read_phy_reg_i2c(
struct e1000_hw *hw, u32 offset, u16 *data);
68 s32 igb_write_phy_reg_i2c(
struct e1000_hw *hw, u32 offset, u16 data);
69 s32 igb_read_sfp_data_byte(
struct e1000_hw *hw, u16 offset, u8 *data);
70 s32 igb_copper_link_setup_82580(
struct e1000_hw *hw);
71 s32 igb_get_phy_info_82580(
struct e1000_hw *hw);
72 s32 igb_phy_force_speed_duplex_82580(
struct e1000_hw *hw);
73 s32 igb_get_cable_length_82580(
struct e1000_hw *hw);
74 s32 igb_read_phy_reg_gs40g(
struct e1000_hw *hw, u32 offset, u16 *data);
75 s32 igb_write_phy_reg_gs40g(
struct e1000_hw *hw, u32 offset, u16 data);
76 s32 igb_check_polarity_m88(
struct e1000_hw *hw);
79 #define IGP01E1000_PHY_PORT_CONFIG 0x10
80 #define IGP01E1000_PHY_PORT_STATUS 0x11
81 #define IGP01E1000_PHY_PORT_CTRL 0x12
82 #define IGP01E1000_PHY_LINK_HEALTH 0x13
83 #define IGP02E1000_PHY_POWER_MGMT 0x19
84 #define IGP01E1000_PHY_PAGE_SELECT 0x1F
85 #define IGP01E1000_PHY_PCS_INIT_REG 0x00B4
86 #define IGP01E1000_PHY_POLARITY_MASK 0x0078
87 #define IGP01E1000_PSCR_AUTO_MDIX 0x1000
88 #define IGP01E1000_PSCR_FORCE_MDI_MDIX 0x2000
89 #define IGP01E1000_PSCFR_SMART_SPEED 0x0080
91 #define I82580_ADDR_REG 16
92 #define I82580_CFG_REG 22
93 #define I82580_CFG_ASSERT_CRS_ON_TX (1 << 15)
94 #define I82580_CFG_ENABLE_DOWNSHIFT (3 << 10)
95 #define I82580_CTRL_REG 23
96 #define I82580_CTRL_DOWNSHIFT_MASK (7 << 10)
99 #define I82580_PHY_CTRL_2 18
100 #define I82580_PHY_LBK_CTRL 19
101 #define I82580_PHY_STATUS_2 26
102 #define I82580_PHY_DIAG_STATUS 31
105 #define I82580_PHY_STATUS2_REV_POLARITY 0x0400
106 #define I82580_PHY_STATUS2_MDIX 0x0800
107 #define I82580_PHY_STATUS2_SPEED_MASK 0x0300
108 #define I82580_PHY_STATUS2_SPEED_1000MBPS 0x0200
109 #define I82580_PHY_STATUS2_SPEED_100MBPS 0x0100
112 #define I82580_PHY_CTRL2_MANUAL_MDIX 0x0200
113 #define I82580_PHY_CTRL2_AUTO_MDI_MDIX 0x0400
114 #define I82580_PHY_CTRL2_MDIX_CFG_MASK 0x0600
117 #define I82580_DSTATUS_CABLE_LENGTH 0x03FC
118 #define I82580_DSTATUS_CABLE_LENGTH_SHIFT 2
121 #define E1000_82580_PHY_POWER_MGMT 0xE14
122 #define E1000_82580_PM_SPD 0x0001
123 #define E1000_82580_PM_D0_LPLU 0x0002
124 #define E1000_82580_PM_D3_LPLU 0x0004
125 #define E1000_82580_PM_GO_LINKD 0x0020
128 #define IGP02E1000_PM_D0_LPLU 0x0002
129 #define IGP02E1000_PM_D3_LPLU 0x0004
130 #define IGP01E1000_PLHR_SS_DOWNGRADE 0x8000
131 #define IGP01E1000_PSSR_POLARITY_REVERSED 0x0002
132 #define IGP01E1000_PSSR_MDIX 0x0800
133 #define IGP01E1000_PSSR_SPEED_MASK 0xC000
134 #define IGP01E1000_PSSR_SPEED_1000MBPS 0xC000
135 #define IGP02E1000_PHY_CHANNEL_NUM 4
136 #define IGP02E1000_PHY_AGC_A 0x11B1
137 #define IGP02E1000_PHY_AGC_B 0x12B1
138 #define IGP02E1000_PHY_AGC_C 0x14B1
139 #define IGP02E1000_PHY_AGC_D 0x18B1
140 #define IGP02E1000_AGC_LENGTH_SHIFT 9
141 #define IGP02E1000_AGC_LENGTH_MASK 0x7F
142 #define IGP02E1000_AGC_RANGE 15
144 #define E1000_CABLE_LENGTH_UNDEFINED 0xFF
147 #define GS40G_PAGE_SELECT 0x16
148 #define GS40G_PAGE_SHIFT 16
149 #define GS40G_OFFSET_MASK 0xFFFF
150 #define GS40G_PAGE_2 0x20000
151 #define GS40G_MAC_REG2 0x15
152 #define GS40G_MAC_LB 0x4140
153 #define GS40G_MAC_SPEED_1G 0X0006
154 #define GS40G_COPPER_SPEC 0x0010
155 #define GS40G_LINE_LB 0x4000
158 #define E1000_SFF_IDENTIFIER_OFFSET 0x00
159 #define E1000_SFF_IDENTIFIER_SFF 0x02
160 #define E1000_SFF_IDENTIFIER_SFP 0x03
162 #define E1000_SFF_ETH_FLAGS_OFFSET 0x06
164 struct e1000_sfp_flags {