Xenomai  3.1.2
e1000.h
1 /*******************************************************************************
2 
3  Intel PRO/1000 Linux driver
4  Copyright(c) 1999 - 2011 Intel Corporation.
5 
6  This program is free software; you can redistribute it and/or modify it
7  under the terms and conditions of the GNU General Public License,
8  version 2, as published by the Free Software Foundation.
9 
10  This program is distributed in the hope it will be useful, but WITHOUT
11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13  more details.
14 
15  You should have received a copy of the GNU General Public License along with
16  this program; if not, write to the Free Software Foundation, Inc.,
17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 
19  The full GNU General Public License is included in this distribution in
20  the file called "COPYING".
21 
22  Contact Information:
23  Linux NICS <linux.nics@intel.com>
24  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26 
27 *******************************************************************************/
28 
29 /* Linux PRO/1000 Ethernet Driver main header file */
30 
31 #ifndef _E1000_H_
32 #define _E1000_H_
33 
34 #include <linux/bitops.h>
35 #include <linux/types.h>
36 #include <linux/timer.h>
37 #include <linux/workqueue.h>
38 #include <linux/io.h>
39 #include <linux/netdevice.h>
40 #include <linux/pci.h>
41 #include <linux/crc32.h>
42 #include <linux/if_vlan.h>
43 
44 #include <rtnet_port.h>
45 
46 #include "hw.h"
47 
48 struct e1000_info;
49 
50 #define e_dbg(format, arg...) \
51  pr_debug(format, ## arg)
52 #define e_err(format, arg...) \
53  pr_err(format, ## arg)
54 #define e_info(format, arg...) \
55  pr_info(format, ## arg)
56 #define e_warn(format, arg...) \
57  pr_warn(format, ## arg)
58 #define e_notice(format, arg...) \
59  pr_notice(format, ## arg)
60 
61 
62 /* Interrupt modes, as used by the IntMode parameter */
63 #define E1000E_INT_MODE_LEGACY 0
64 #define E1000E_INT_MODE_MSI 1
65 #define E1000E_INT_MODE_MSIX 2
66 
67 /* Tx/Rx descriptor defines */
68 #define E1000_DEFAULT_TXD 256
69 #define E1000_MAX_TXD 4096
70 #define E1000_MIN_TXD 64
71 
72 #define E1000_DEFAULT_RXD 256
73 #define E1000_MAX_RXD 4096
74 #define E1000_MIN_RXD 64
75 
76 #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
77 #define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
78 
79 /* Early Receive defines */
80 #define E1000_ERT_2048 0x100
81 
82 #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
83 
84 /* How many Tx Descriptors do we need to call netif_wake_queue ? */
85 /* How many Rx Buffers do we bundle into one write to the hardware ? */
86 #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
87 
88 #define AUTO_ALL_MODES 0
89 #define E1000_EEPROM_APME 0x0400
90 
91 #define E1000_MNG_VLAN_NONE (-1)
92 
93 /* Number of packet split data buffers (not including the header buffer) */
94 #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
95 
96 #define DEFAULT_JUMBO 9234
97 
98 /* BM/HV Specific Registers */
99 #define BM_PORT_CTRL_PAGE 769
100 
101 #define PHY_UPPER_SHIFT 21
102 #define BM_PHY_REG(page, reg) \
103  (((reg) & MAX_PHY_REG_ADDRESS) |\
104  (((page) & 0xFFFF) << PHY_PAGE_SHIFT) |\
105  (((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))
106 
107 /* PHY Wakeup Registers and defines */
108 #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
109 #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
110 #define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
111 #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
112 #define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
113 #define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
114 #define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
115 #define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
116 #define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
117 #define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))
118 
119 #define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
120 #define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
121 #define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
122 #define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
123 #define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
124 #define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
125 #define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */
126 
127 #define HV_STATS_PAGE 778
128 #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision Count */
129 #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17)
130 #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. Count */
131 #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19)
132 #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Coll. Count */
133 #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21)
134 #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision Count */
135 #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
136 #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision Count */
137 #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26)
138 #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
139 #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28)
140 #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Transmit with no CRS */
141 #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30)
142 
143 #define E1000_FCRTV_PCH 0x05F40 /* PCH Flow Control Refresh Timer Value */
144 
145 /* BM PHY Copper Specific Status */
146 #define BM_CS_STATUS 17
147 #define BM_CS_STATUS_LINK_UP 0x0400
148 #define BM_CS_STATUS_RESOLVED 0x0800
149 #define BM_CS_STATUS_SPEED_MASK 0xC000
150 #define BM_CS_STATUS_SPEED_1000 0x8000
151 
152 /* 82577 Mobile Phy Status Register */
153 #define HV_M_STATUS 26
154 #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
155 #define HV_M_STATUS_SPEED_MASK 0x0300
156 #define HV_M_STATUS_SPEED_1000 0x0200
157 #define HV_M_STATUS_LINK_UP 0x0040
158 
159 #define E1000_ICH_FWSM_PCIM2PCI 0x01000000 /* ME PCIm-to-PCI active */
160 #define E1000_ICH_FWSM_PCIM2PCI_COUNT 2000
161 
162 /* Time to wait before putting the device into D3 if there's no link (in ms). */
163 #define LINK_TIMEOUT 100
164 
165 #define DEFAULT_RDTR 0
166 #define DEFAULT_RADV 8
167 #define BURST_RDTR 0x20
168 #define BURST_RADV 0x20
169 
170 /*
171  * in the case of WTHRESH, it appears at least the 82571/2 hardware
172  * writes back 4 descriptors when WTHRESH=5, and 3 descriptors when
173  * WTHRESH=4, and since we want 64 bytes at a time written back, set
174  * it to 5
175  */
176 #define E1000_TXDCTL_DMA_BURST_ENABLE \
177  (E1000_TXDCTL_GRAN | /* set descriptor granularity */ \
178  E1000_TXDCTL_COUNT_DESC | \
179  (5 << 16) | /* wthresh must be +1 more than desired */\
180  (1 << 8) | /* hthresh */ \
181  0x1f) /* pthresh */
182 
183 #define E1000_RXDCTL_DMA_BURST_ENABLE \
184  (0x01000000 | /* set descriptor granularity */ \
185  (4 << 16) | /* set writeback threshold */ \
186  (4 << 8) | /* set prefetch threshold */ \
187  0x20) /* set hthresh */
188 
189 #define E1000_TIDV_FPD (1 << 31)
190 #define E1000_RDTR_FPD (1 << 31)
191 
192 enum e1000_boards {
193  board_82571,
194  board_82572,
195  board_82573,
196  board_82574,
197  board_82583,
198  board_80003es2lan,
199  board_ich8lan,
200  board_ich9lan,
201  board_ich10lan,
202  board_pchlan,
203  board_pch2lan,
204  board_pch_lpt,
205 };
206 
207 struct e1000_ps_page {
208  struct page *page;
209  u64 dma; /* must be u64 - written to hw */
210 };
211 
212 /*
213  * wrappers around a pointer to a socket buffer,
214  * so a DMA handle can be stored along with the buffer
215  */
216 struct e1000_buffer {
217  dma_addr_t dma;
218  struct rtskb *skb;
219  union {
220  /* Tx */
221  struct {
222  unsigned long time_stamp;
223  u16 length;
224  u16 next_to_watch;
225  unsigned int segs;
226  unsigned int bytecount;
227  u16 mapped_as_page;
228  };
229  /* Rx */
230  struct {
231  /* arrays of page information for packet split */
232  struct e1000_ps_page *ps_pages;
233  struct page *page;
234  };
235  };
236 };
237 
238 struct e1000_ring {
239  void *desc; /* pointer to ring memory */
240  dma_addr_t dma; /* phys address of ring */
241  unsigned int size; /* length of ring in bytes */
242  unsigned int count; /* number of desc. in ring */
243 
244  u16 next_to_use;
245  u16 next_to_clean;
246 
247  u16 head;
248  u16 tail;
249 
250  /* array of buffer information structs */
251  struct e1000_buffer *buffer_info;
252 
253  char name[IFNAMSIZ + 5];
254  u32 ims_val;
255  u32 itr_val;
256  u16 itr_register;
257  int set_itr;
258 
259  struct rtskb *rx_skb_top;
260 
261  rtdm_lock_t lock;
262 };
263 
264 /* PHY register snapshot values */
265 struct e1000_phy_regs {
266  u16 bmcr; /* basic mode control register */
267  u16 bmsr; /* basic mode status register */
268  u16 advertise; /* auto-negotiation advertisement */
269  u16 lpa; /* link partner ability register */
270  u16 expansion; /* auto-negotiation expansion reg */
271  u16 ctrl1000; /* 1000BASE-T control register */
272  u16 stat1000; /* 1000BASE-T status register */
273  u16 estatus; /* extended status register */
274 };
275 
276 /* board specific private data structure */
277 struct e1000_adapter {
278  struct timer_list watchdog_timer;
279  struct timer_list phy_info_timer;
280  struct timer_list blink_timer;
281 
282  struct work_struct reset_task;
283  struct work_struct watchdog_task;
284 
285  const struct e1000_info *ei;
286 
287  unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
288  u32 bd_number;
289  u32 rx_buffer_len;
290  u16 mng_vlan_id;
291  u16 link_speed;
292  u16 link_duplex;
293  u16 eeprom_vers;
294 
295  /* track device up/down/testing state */
296  unsigned long state;
297 
298  /* Interrupt Throttle Rate */
299  u32 itr;
300  u32 itr_setting;
301  u16 tx_itr;
302  u16 rx_itr;
303 
304  /*
305  * Tx
306  */
307  struct e1000_ring *tx_ring /* One per active queue */
308  ____cacheline_aligned_in_smp;
309 
310  struct napi_struct napi;
311 
312  unsigned int restart_queue;
313  u32 txd_cmd;
314 
315  bool detect_tx_hung;
316  u8 tx_timeout_factor;
317 
318  u32 tx_int_delay;
319  u32 tx_abs_int_delay;
320 
321  unsigned int total_tx_bytes;
322  unsigned int total_tx_packets;
323  unsigned int total_rx_bytes;
324  unsigned int total_rx_packets;
325 
326  /* Tx stats */
327  u64 tpt_old;
328  u64 colc_old;
329  u32 gotc;
330  u64 gotc_old;
331  u32 tx_timeout_count;
332  u32 tx_fifo_head;
333  u32 tx_head_addr;
334  u32 tx_fifo_size;
335  u32 tx_dma_failed;
336 
337  /*
338  * Rx
339  */
340  bool (*clean_rx) (struct e1000_adapter *adapter,
341  nanosecs_abs_t *time_stamp)
342  ____cacheline_aligned_in_smp;
343  void (*alloc_rx_buf) (struct e1000_adapter *adapter,
344  int cleaned_count, gfp_t gfp);
345  struct e1000_ring *rx_ring;
346 
347  u32 rx_int_delay;
348  u32 rx_abs_int_delay;
349 
350  /* Rx stats */
351  u64 hw_csum_err;
352  u64 hw_csum_good;
353  u64 rx_hdr_split;
354  u32 gorc;
355  u64 gorc_old;
356  u32 alloc_rx_buff_failed;
357  u32 rx_dma_failed;
358 
359  unsigned int rx_ps_pages;
360  u16 rx_ps_bsize0;
361  u32 max_frame_size;
362  u32 min_frame_size;
363 
364  /* OS defined structs */
365  struct rtnet_device *netdev;
366  struct pci_dev *pdev;
367 
368  rtdm_irq_t irq_handle;
369  rtdm_irq_t rx_irq_handle;
370  rtdm_irq_t tx_irq_handle;
371  rtdm_nrtsig_t mod_timer_sig;
372  rtdm_nrtsig_t downshift_sig;
373 
374  /* structs defined in e1000_hw.h */
375  struct e1000_hw hw;
376 
377  spinlock_t stats64_lock;
378  struct e1000_hw_stats stats;
379  struct e1000_phy_info phy_info;
380  struct e1000_phy_stats phy_stats;
381 
382  /* Snapshot of PHY registers */
383  struct e1000_phy_regs phy_regs;
384 
385  struct e1000_ring test_tx_ring;
386  struct e1000_ring test_rx_ring;
387  u32 test_icr;
388 
389  u32 msg_enable;
390  unsigned int num_vectors;
391  struct msix_entry *msix_entries;
392  int int_mode;
393  u32 eiac_mask;
394 
395  u32 eeprom_wol;
396  u32 wol;
397  u32 pba;
398  u32 max_hw_frame_size;
399 
400  bool fc_autoneg;
401 
402  unsigned int flags;
403  unsigned int flags2;
404  struct work_struct downshift_task;
405  struct work_struct update_phy_task;
406  struct work_struct print_hang_task;
407 
408  bool idle_check;
409  int phy_hang_count;
410 };
411 
412 struct e1000_info {
413  enum e1000_mac_type mac;
414  unsigned int flags;
415  unsigned int flags2;
416  u32 pba;
417  u32 max_hw_frame_size;
418  s32 (*get_variants)(struct e1000_adapter *);
419  const struct e1000_mac_operations *mac_ops;
420  const struct e1000_phy_operations *phy_ops;
421  const struct e1000_nvm_operations *nvm_ops;
422 };
423 
424 /* hardware capability, feature, and workaround flags */
425 #define FLAG_HAS_AMT (1 << 0)
426 #define FLAG_HAS_FLASH (1 << 1)
427 #define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
428 #define FLAG_HAS_WOL (1 << 3)
429 #define FLAG_HAS_ERT (1 << 4)
430 #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
431 #define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
432 #define FLAG_HAS_JUMBO_FRAMES (1 << 7)
433 #define FLAG_READ_ONLY_NVM (1 << 8)
434 #define FLAG_IS_ICH (1 << 9)
435 #define FLAG_HAS_MSIX (1 << 10)
436 #define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
437 #define FLAG_IS_QUAD_PORT_A (1 << 12)
438 #define FLAG_IS_QUAD_PORT (1 << 13)
439 #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
440 #define FLAG_APME_IN_WUC (1 << 15)
441 #define FLAG_APME_IN_CTRL3 (1 << 16)
442 #define FLAG_APME_CHECK_PORT_B (1 << 17)
443 #define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
444 #define FLAG_NO_WAKE_UCAST (1 << 19)
445 #define FLAG_MNG_PT_ENABLED (1 << 20)
446 #define FLAG_RESET_OVERWRITES_LAA (1 << 21)
447 #define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
448 #define FLAG_TARC_SET_BIT_ZERO (1 << 23)
449 #define FLAG_RX_NEEDS_RESTART (1 << 24)
450 #define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
451 #define FLAG_SMART_POWER_DOWN (1 << 26)
452 #define FLAG_MSI_ENABLED (1 << 27)
453 /* reserved (1 << 28) */
454 #define FLAG_TSO_FORCE (1 << 29)
455 #define FLAG_RX_RESTART_NOW (1 << 30)
456 #define FLAG_MSI_TEST_FAILED (1 << 31)
457 
458 #define FLAG2_CRC_STRIPPING (1 << 0)
459 #define FLAG2_HAS_PHY_WAKEUP (1 << 1)
460 #define FLAG2_IS_DISCARDING (1 << 2)
461 #define FLAG2_DISABLE_ASPM_L1 (1 << 3)
462 #define FLAG2_HAS_PHY_STATS (1 << 4)
463 #define FLAG2_HAS_EEE (1 << 5)
464 #define FLAG2_DMA_BURST (1 << 6)
465 #define FLAG2_DISABLE_ASPM_L0S (1 << 7)
466 #define FLAG2_DISABLE_AIM (1 << 8)
467 #define FLAG2_CHECK_PHY_HANG (1 << 9)
468 #define FLAG2_NO_DISABLE_RX (1 << 10)
469 #define FLAG2_PCIM2PCI_ARBITER_WA (1 << 11)
470 
471 #define E1000_RX_DESC_PS(R, i) \
472  (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
473 #define E1000_RX_DESC_EXT(R, i) \
474  (&(((union e1000_rx_desc_extended *)((R).desc))[i]))
475 #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
476 #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
477 #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
478 
479 enum e1000_state_t {
480  __E1000_TESTING,
481  __E1000_RESETTING,
482  __E1000_ACCESS_SHARED_RESOURCE,
483  __E1000_DOWN
484 };
485 
486 enum latency_range {
487  lowest_latency = 0,
488  low_latency = 1,
489  bulk_latency = 2,
490  latency_invalid = 255
491 };
492 
493 extern char e1000e_driver_name[];
494 extern const char e1000e_driver_version[];
495 
496 extern void e1000e_check_options(struct e1000_adapter *adapter);
497 extern void e1000e_set_ethtool_ops(struct net_device *netdev);
498 
499 extern int e1000e_up(struct e1000_adapter *adapter);
500 extern void e1000e_down(struct e1000_adapter *adapter);
501 extern void e1000e_reinit_locked(struct e1000_adapter *adapter);
502 extern void e1000e_reset(struct e1000_adapter *adapter);
503 extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
504 extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
505 extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
506 extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
507 extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
508 extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
509  struct rtnl_link_stats64
510  *stats);
511 extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
512 extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
513 extern void e1000e_get_hw_control(struct e1000_adapter *adapter);
514 extern void e1000e_release_hw_control(struct e1000_adapter *adapter);
515 
516 extern unsigned int copybreak;
517 
518 extern char *e1000e_get_hw_dev_name(struct e1000_hw *hw);
519 
520 extern const struct e1000_info e1000_82571_info;
521 extern const struct e1000_info e1000_82572_info;
522 extern const struct e1000_info e1000_82573_info;
523 extern const struct e1000_info e1000_82574_info;
524 extern const struct e1000_info e1000_82583_info;
525 extern const struct e1000_info e1000_ich8_info;
526 extern const struct e1000_info e1000_ich9_info;
527 extern const struct e1000_info e1000_ich10_info;
528 extern const struct e1000_info e1000_pch_info;
529 extern const struct e1000_info e1000_pch2_info;
530 extern const struct e1000_info e1000_pch_lpt_info;
531 extern const struct e1000_info e1000_es2_info;
532 
533 extern s32 e1000_read_pba_string_generic(struct e1000_hw *hw, u8 *pba_num,
534  u32 pba_num_size);
535 
536 extern s32 e1000e_commit_phy(struct e1000_hw *hw);
537 
538 extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
539 
540 extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
541 extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
542 
543 extern void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw);
544 extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
545  bool state);
546 extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
547 extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
548 extern void e1000_suspend_workarounds_ich8lan(struct e1000_hw *hw);
549 extern void e1000_resume_workarounds_pchlan(struct e1000_hw *hw);
550 extern s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
551 extern s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable);
552 extern void e1000_copy_rx_addrs_to_phy_ich8lan(struct e1000_hw *hw);
553 
554 extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
555 extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
556 extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
557 extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
558 extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
559 extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
560 extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
561 extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
562 extern void e1000_set_lan_id_multi_port_pcie(struct e1000_hw *hw);
563 extern void e1000_set_lan_id_single_port(struct e1000_hw *hw);
564 extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
565 extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
566 extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
567 extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
568 extern s32 e1000e_id_led_init(struct e1000_hw *hw);
569 extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
570 extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
571 extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
572 extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
573 extern s32 e1000e_setup_link(struct e1000_hw *hw);
574 extern void e1000_clear_vfta_generic(struct e1000_hw *hw);
575 extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
576 extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
577  u8 *mc_addr_list,
578  u32 mc_addr_count);
579 extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
580 extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
581 extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
582 extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
583 extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
584 extern void e1000e_config_collision_dist(struct e1000_hw *hw);
585 extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
586 extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
587 extern s32 e1000e_blink_led_generic(struct e1000_hw *hw);
588 extern void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
589 extern s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw);
590 extern void e1000e_reset_adaptive(struct e1000_hw *hw);
591 extern void e1000e_update_adaptive(struct e1000_hw *hw);
592 
593 extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
594 extern s32 e1000e_get_phy_id(struct e1000_hw *hw);
595 extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
596 extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
597 extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
598 extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
599 extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
600 extern s32 e1000_set_page_igp(struct e1000_hw *hw, u16 page);
601 extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
602 extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
603  u16 *data);
604 extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
605 extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
606 extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
607 extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
608  u16 data);
609 extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
610 extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
611 extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
612 extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
613 extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
614 extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
615 extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
616 extern s32 e1000e_phy_init_script_igp3(struct e1000_hw *hw);
617 extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
618 extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
619 extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
620 extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
621 extern s32 e1000_enable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
622  u16 *phy_reg);
623 extern s32 e1000_disable_phy_wakeup_reg_access_bm(struct e1000_hw *hw,
624  u16 *phy_reg);
625 extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
626 extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
627 extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
628 extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
629 extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
630  u16 data);
631 extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
632 extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
633  u16 *data);
634 extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
635  u32 usec_interval, bool *success);
636 extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
637 extern void e1000_power_up_phy_copper(struct e1000_hw *hw);
638 extern void e1000_power_down_phy_copper(struct e1000_hw *hw);
639 extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
640 extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
641 extern s32 e1000e_check_downshift(struct e1000_hw *hw);
642 extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
643 extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
644  u16 *data);
645 extern s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
646  u16 *data);
647 extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
648 extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
649  u16 data);
650 extern s32 e1000_write_phy_reg_page_hv(struct e1000_hw *hw, u32 offset,
651  u16 data);
652 extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
653 extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
654 extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
655 extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
656 extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
657 extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);
658 
659 extern s32 e1000_check_polarity_m88(struct e1000_hw *hw);
660 extern s32 e1000_get_phy_info_ife(struct e1000_hw *hw);
661 extern s32 e1000_check_polarity_ife(struct e1000_hw *hw);
662 extern s32 e1000_phy_force_speed_duplex_ife(struct e1000_hw *hw);
663 extern s32 e1000_check_polarity_igp(struct e1000_hw *hw);
664 extern bool e1000_check_phy_82574(struct e1000_hw *hw);
665 
666 static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
667 {
668  return hw->phy.ops.reset(hw);
669 }
670 
671 static inline s32 e1000_check_reset_block(struct e1000_hw *hw)
672 {
673  return hw->phy.ops.check_reset_block(hw);
674 }
675 
676 static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
677 {
678  return hw->phy.ops.read_reg(hw, offset, data);
679 }
680 
681 static inline s32 e1e_rphy_locked(struct e1000_hw *hw, u32 offset, u16 *data)
682 {
683  return hw->phy.ops.read_reg_locked(hw, offset, data);
684 }
685 
686 static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
687 {
688  return hw->phy.ops.write_reg(hw, offset, data);
689 }
690 
691 static inline s32 e1e_wphy_locked(struct e1000_hw *hw, u32 offset, u16 data)
692 {
693  return hw->phy.ops.write_reg_locked(hw, offset, data);
694 }
695 
696 static inline s32 e1000_get_cable_length(struct e1000_hw *hw)
697 {
698  return hw->phy.ops.get_cable_length(hw);
699 }
700 
701 extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
702 extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
703 extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
704 extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
705 extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
706 extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
707 extern void e1000e_release_nvm(struct e1000_hw *hw);
708 extern void e1000e_reload_nvm(struct e1000_hw *hw);
709 extern s32 e1000_read_mac_addr_generic(struct e1000_hw *hw);
710 
711 static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
712 {
713  if (hw->mac.ops.read_mac_addr)
714  return hw->mac.ops.read_mac_addr(hw);
715 
716  return e1000_read_mac_addr_generic(hw);
717 }
718 
719 static inline s32 e1000_validate_nvm_checksum(struct e1000_hw *hw)
720 {
721  return hw->nvm.ops.validate(hw);
722 }
723 
724 static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
725 {
726  return hw->nvm.ops.update(hw);
727 }
728 
729 static inline s32 e1000_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
730 {
731  return hw->nvm.ops.read(hw, offset, words, data);
732 }
733 
734 static inline s32 e1000_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
735 {
736  return hw->nvm.ops.write(hw, offset, words, data);
737 }
738 
739 static inline s32 e1000_get_phy_info(struct e1000_hw *hw)
740 {
741  return hw->phy.ops.get_info(hw);
742 }
743 
744 static inline s32 e1000e_check_mng_mode(struct e1000_hw *hw)
745 {
746  return hw->mac.ops.check_mng_mode(hw);
747 }
748 
749 extern bool e1000e_check_mng_mode_generic(struct e1000_hw *hw);
750 extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
751 extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
752 
753 static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
754 {
755  return readl(hw->hw_addr + reg);
756 }
757 
758 static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
759 {
760  writel(val, hw->hw_addr + reg);
761 }
762 
763 #endif /* _E1000_H_ */
ipipe_spinlock_t rtdm_lock_t
Lock variable.
Definition: driver.h:550
uint64_t nanosecs_abs_t
RTDM type for representing absolute dates.
Definition: rtdm.h:43