30 #include "e1000_mac.h"
31 #include "e1000_82575.h"
33 #include <linux/bitops.h>
34 #include <linux/if_vlan.h>
35 #include <linux/i2c.h>
36 #include <linux/i2c-algo-bit.h>
37 #include <linux/pci.h>
38 #include <linux/mdio.h>
42 #undef CONFIG_IGB_HWMON
46 #define E1000_PCS_CFG_IGN_SD 1
49 #define IGB_START_ITR 648
50 #define IGB_4K_ITR 980
51 #define IGB_20K_ITR 196
52 #define IGB_70K_ITR 56
55 #define IGB_DEFAULT_TXD 256
56 #define IGB_DEFAULT_TX_WORK 128
57 #define IGB_MIN_TXD 80
58 #define IGB_MAX_TXD 4096
60 #define IGB_DEFAULT_RXD 256
61 #define IGB_MIN_RXD 80
62 #define IGB_MAX_RXD 4096
64 #define IGB_DEFAULT_ITR 3
65 #define IGB_MAX_ITR_USECS 10000
66 #define IGB_MIN_ITR_USECS 10
67 #define NON_Q_VECTORS 1
68 #define MAX_Q_VECTORS 8
69 #define MAX_MSIX_ENTRIES 10
72 #define IGB_MAX_RX_QUEUES 8
73 #define IGB_MAX_RX_QUEUES_82575 4
74 #define IGB_MAX_RX_QUEUES_I211 2
75 #define IGB_MAX_TX_QUEUES 8
76 #define IGB_MAX_VF_MC_ENTRIES 30
77 #define IGB_MAX_VF_FUNCTIONS 8
78 #define IGB_MAX_VFTA_ENTRIES 128
79 #define IGB_82576_VF_DEV_ID 0x10CA
80 #define IGB_I350_VF_DEV_ID 0x1520
83 #define IGB_MAJOR_MASK 0xF000
84 #define IGB_MINOR_MASK 0x0FF0
85 #define IGB_BUILD_MASK 0x000F
86 #define IGB_COMB_VER_MASK 0x00FF
87 #define IGB_MAJOR_SHIFT 12
88 #define IGB_MINOR_SHIFT 4
89 #define IGB_COMB_VER_SHFT 8
90 #define IGB_NVM_VER_INVALID 0xFFFF
91 #define IGB_ETRACK_SHIFT 16
92 #define NVM_ETRACK_WORD 0x0042
93 #define NVM_COMB_VER_OFF 0x0083
94 #define NVM_COMB_VER_PTR 0x003d
96 struct vf_data_storage {
97 unsigned char vf_mac_addresses[ETH_ALEN];
98 u16 vf_mc_hashes[IGB_MAX_VF_MC_ENTRIES];
102 unsigned long last_nack;
106 bool spoofchk_enabled;
109 #define IGB_VF_FLAG_CTS 0x00000001
110 #define IGB_VF_FLAG_UNI_PROMISC 0x00000002
111 #define IGB_VF_FLAG_MULTI_PROMISC 0x00000004
112 #define IGB_VF_FLAG_PF_SET_MAC 0x00000008
125 #define IGB_RX_PTHRESH ((hw->mac.type == e1000_i354) ? 12 : 8)
126 #define IGB_RX_HTHRESH 8
127 #define IGB_TX_PTHRESH ((hw->mac.type == e1000_i354) ? 20 : 8)
128 #define IGB_TX_HTHRESH 1
129 #define IGB_RX_WTHRESH ((hw->mac.type == e1000_82576 && \
130 (adapter->flags & IGB_FLAG_HAS_MSIX)) ? 1 : 4)
131 #define IGB_TX_WTHRESH ((hw->mac.type == e1000_82576 && \
132 (adapter->flags & IGB_FLAG_HAS_MSIX)) ? 1 : 16)
135 #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
138 #define IGB_RXBUFFER_256 256
139 #define IGB_RXBUFFER_2048 2048
140 #define IGB_RX_HDR_LEN IGB_RXBUFFER_256
141 #define IGB_RX_BUFSZ IGB_RXBUFFER_2048
144 #define IGB_RX_BUFFER_WRITE 16
146 #define AUTO_ALL_MODES 0
147 #define IGB_EEPROM_APME 0x0400
149 #ifndef IGB_MASTER_SLAVE
151 #define IGB_MASTER_SLAVE e1000_ms_hw_default
154 #define IGB_MNG_VLAN_NONE -1
158 IGB_TX_FLAGS_VLAN = 0x01,
159 IGB_TX_FLAGS_TSO = 0x02,
160 IGB_TX_FLAGS_TSTAMP = 0x04,
163 IGB_TX_FLAGS_IPV4 = 0x10,
164 IGB_TX_FLAGS_CSUM = 0x20,
168 #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000
169 #define IGB_TX_FLAGS_VLAN_SHIFT 16
174 #define IGB_MAX_TXD_PWR 15
175 #define IGB_MAX_DATA_PER_TXD (1 << IGB_MAX_TXD_PWR)
178 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IGB_MAX_DATA_PER_TXD)
179 #define DESC_NEEDED (MAX_SKB_FRAGS + 4)
182 #define IGB_SFF_8472_SWAP 0x5C
183 #define IGB_SFF_8472_COMP 0x5E
186 #define IGB_SFF_ADDRESSING_MODE 0x4
187 #define IGB_SFF_8472_UNSUP 0x00
192 struct igb_tx_buffer {
193 union e1000_adv_tx_desc *next_to_watch;
194 unsigned long time_stamp;
196 unsigned int bytecount;
203 struct igb_rx_buffer {
208 struct igb_tx_queue_stats {
215 struct igb_rx_queue_stats {
223 struct igb_ring_container {
224 struct igb_ring *ring;
225 unsigned int total_bytes;
226 unsigned int total_packets;
233 struct igb_q_vector *q_vector;
234 struct rtnet_device *netdev;
237 struct igb_tx_buffer *tx_buffer_info;
238 struct igb_rx_buffer *rx_buffer_info;
258 struct igb_tx_queue_stats tx_stats;
262 struct igb_rx_queue_stats rx_stats;
266 } ____cacheline_internodealigned_in_smp;
268 struct igb_q_vector {
269 struct igb_adapter *adapter;
275 void __iomem *itr_register;
277 struct igb_ring_container rx, tx;
280 char name[IFNAMSIZ + 9];
283 struct igb_ring ring[0] ____cacheline_internodealigned_in_smp;
286 enum e1000_ring_flags_t {
287 IGB_RING_FLAG_RX_SCTP_CSUM,
288 IGB_RING_FLAG_RX_LB_VLAN_BSWAP,
289 IGB_RING_FLAG_TX_CTX_IDX,
290 IGB_RING_FLAG_TX_DETECT_HANG
293 #define IGB_TXD_DCMD (E1000_ADVTXD_DCMD_EOP | E1000_ADVTXD_DCMD_RS)
295 #define IGB_RX_DESC(R, i) \
296 (&(((union e1000_adv_rx_desc *)((R)->desc))[i]))
297 #define IGB_TX_DESC(R, i) \
298 (&(((union e1000_adv_tx_desc *)((R)->desc))[i]))
299 #define IGB_TX_CTXTDESC(R, i) \
300 (&(((struct e1000_adv_tx_context_desc *)((R)->desc))[i]))
303 static inline __le32 igb_test_staterr(
union e1000_adv_rx_desc *rx_desc,
304 const u32 stat_err_bits)
306 return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
310 static inline int igb_desc_unused(
struct igb_ring *ring)
312 if (ring->next_to_clean > ring->next_to_use)
313 return ring->next_to_clean - ring->next_to_use - 1;
315 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
318 #ifdef CONFIG_IGB_HWMON
320 #define IGB_HWMON_TYPE_LOC 0
321 #define IGB_HWMON_TYPE_TEMP 1
322 #define IGB_HWMON_TYPE_CAUTION 2
323 #define IGB_HWMON_TYPE_MAX 3
326 struct device_attribute dev_attr;
328 struct e1000_thermal_diode_data *sensor;
333 struct attribute_group group;
334 const struct attribute_group *groups[2];
335 struct attribute *attrs[E1000_MAX_SENSORS * 4 + 1];
336 struct hwmon_attr hwmon_list[E1000_MAX_SENSORS * 4];
337 unsigned int n_hwmon;
341 #define IGB_N_EXTTS 2
342 #define IGB_N_PEROUT 2
344 #define IGB_RETA_SIZE 128
348 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
350 struct rtnet_device *netdev;
355 unsigned int num_q_vectors;
356 struct msix_entry msix_entries[MAX_MSIX_ENTRIES];
357 rtdm_irq_t msix_irq_handle[MAX_MSIX_ENTRIES];
358 rtdm_irq_t irq_handle;
359 rtdm_nrtsig_t watchdog_nrtsig;
360 spinlock_t stats64_lock;
370 u32 tx_timeout_count;
372 struct igb_ring *tx_ring[16];
376 struct igb_ring *rx_ring[16];
381 struct timer_list watchdog_timer;
382 struct timer_list phy_info_timer;
391 struct work_struct reset_task;
392 struct work_struct watchdog_task;
394 u8 tx_timeout_factor;
395 struct timer_list blink_timer;
396 unsigned long led_status;
399 struct pci_dev *pdev;
401 struct net_device_stats net_stats;
405 struct e1000_hw_stats stats;
406 struct e1000_phy_info phy_info;
409 struct igb_ring test_tx_ring;
410 struct igb_ring test_rx_ring;
412 struct igb_q_vector *q_vector[MAX_Q_VECTORS];
413 u32 eims_enable_mask;
419 int vf_rate_link_speed;
424 unsigned long last_rx_timestamp;
427 #ifdef CONFIG_IGB_HWMON
428 struct hwmon_buff *igb_hwmon_buff;
431 struct i2c_algo_bit_data i2c_algo;
432 struct i2c_adapter i2c_adap;
433 struct i2c_client *i2c_client;
434 u32 rss_indir_tbl_init;
435 u8 rss_indir_tbl[IGB_RETA_SIZE];
437 unsigned long link_check_timeout;
439 struct e1000_info ei;
443 #define IGB_FLAG_HAS_MSI (1 << 0)
444 #define IGB_FLAG_DCA_ENABLED (1 << 1)
445 #define IGB_FLAG_QUAD_PORT_A (1 << 2)
446 #define IGB_FLAG_QUEUE_PAIRS (1 << 3)
447 #define IGB_FLAG_DMAC (1 << 4)
448 #define IGB_FLAG_PTP (1 << 5)
449 #define IGB_FLAG_RSS_FIELD_IPV4_UDP (1 << 6)
450 #define IGB_FLAG_RSS_FIELD_IPV6_UDP (1 << 7)
451 #define IGB_FLAG_WOL_SUPPORTED (1 << 8)
452 #define IGB_FLAG_NEED_LINK_UPDATE (1 << 9)
453 #define IGB_FLAG_MEDIA_RESET (1 << 10)
454 #define IGB_FLAG_MAS_CAPABLE (1 << 11)
455 #define IGB_FLAG_MAS_ENABLE (1 << 12)
456 #define IGB_FLAG_HAS_MSIX (1 << 13)
457 #define IGB_FLAG_EEE (1 << 14)
460 #define IGB_MAS_ENABLE_0 0X0001
461 #define IGB_MAS_ENABLE_1 0X0002
462 #define IGB_MAS_ENABLE_2 0X0004
463 #define IGB_MAS_ENABLE_3 0X0008
466 #define IGB_MIN_TXPBSIZE 20408
467 #define IGB_TX_BUF_4096 4096
468 #define IGB_DMCTLX_DCFLUSH_DIS 0x80000000
470 #define IGB_82576_TSYNC_SHIFT 19
471 #define IGB_TS_HDR_LEN 16
476 __IGB_PTP_TX_IN_PROGRESS,
483 extern char igb_driver_name[];
484 extern char igb_driver_version[];
486 int igb_up(
struct igb_adapter *);
487 void igb_down(
struct igb_adapter *);
488 void igb_reinit_locked(
struct igb_adapter *);
489 void igb_reset(
struct igb_adapter *);
490 int igb_reinit_queues(
struct igb_adapter *);
491 void igb_write_rss_indir_tbl(
struct igb_adapter *);
492 int igb_set_spd_dplx(
struct igb_adapter *, u32, u8);
493 int igb_setup_tx_resources(
struct igb_ring *);
494 int igb_setup_rx_resources(
struct igb_ring *);
495 void igb_free_tx_resources(
struct igb_ring *);
496 void igb_free_rx_resources(
struct igb_ring *);
497 void igb_configure_tx_ring(
struct igb_adapter *,
struct igb_ring *);
498 void igb_configure_rx_ring(
struct igb_adapter *,
struct igb_ring *);
499 void igb_setup_tctl(
struct igb_adapter *);
500 void igb_setup_rctl(
struct igb_adapter *);
501 netdev_tx_t igb_xmit_frame_ring(
struct rtskb *,
struct igb_ring *);
502 void igb_unmap_and_free_tx_resource(
struct igb_ring *,
struct igb_tx_buffer *);
503 void igb_alloc_rx_buffers(
struct igb_ring *, u16);
504 void igb_update_stats(
struct igb_adapter *);
505 bool igb_has_link(
struct igb_adapter *adapter);
506 void igb_set_ethtool_ops(
struct rtnet_device *);
507 void igb_power_up_link(
struct igb_adapter *);
508 void igb_set_fw_version(
struct igb_adapter *);
509 void igb_ptp_init(
struct igb_adapter *adapter);
510 void igb_ptp_stop(
struct igb_adapter *adapter);
511 void igb_ptp_reset(
struct igb_adapter *adapter);
512 void igb_ptp_rx_hang(
struct igb_adapter *adapter);
513 void igb_ptp_rx_rgtstamp(
struct igb_q_vector *q_vector,
struct rtskb *skb);
514 void igb_ptp_rx_pktstamp(
struct igb_q_vector *q_vector,
unsigned char *va,
516 int igb_ptp_set_ts_config(
struct rtnet_device *netdev,
struct ifreq *ifr);
517 int igb_ptp_get_ts_config(
struct rtnet_device *netdev,
struct ifreq *ifr);
518 #ifdef CONFIG_IGB_HWMON
519 void igb_sysfs_exit(
struct igb_adapter *adapter);
520 int igb_sysfs_init(
struct igb_adapter *adapter);
522 static inline s32 igb_reset_phy(
struct e1000_hw *hw)
524 if (hw->phy.ops.reset)
525 return hw->phy.ops.reset(hw);
530 static inline s32 igb_read_phy_reg(
struct e1000_hw *hw, u32 offset, u16 *data)
532 if (hw->phy.ops.read_reg)
533 return hw->phy.ops.read_reg(hw, offset, data);
538 static inline s32 igb_write_phy_reg(
struct e1000_hw *hw, u32 offset, u16 data)
540 if (hw->phy.ops.write_reg)
541 return hw->phy.ops.write_reg(hw, offset, data);
546 static inline s32 igb_get_phy_info(
struct e1000_hw *hw)
548 if (hw->phy.ops.get_phy_info)
549 return hw->phy.ops.get_phy_info(hw);
554 static inline struct rtnet_device *txring_txq(
const struct igb_ring *tx_ring)
556 return tx_ring->netdev;